z15 – WikiChip Fuse

IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

March 8, 2020 David Schor 5 Comments 14HP, cache, eDRAM, IBM, IBM Z, ISSCC, ISSCC 2020, z/Architecture, z14, z15

IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.

Architectures Server Processors

IBM Introduces Next-Gen Z Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

September 14, 2019 David Schor 3 Comments 14 nm, 14HP, cache, eDRAM, IBM, z/Architecture, z15

IBM introduces its latest Z mainframe, the z15. Here’s a detailed look at the changes and enhancements that were made including the new system architecture and CPU microarchitecture.