Skip to content
Wednesday, September 27, 2023
Latest:
  • Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
  • Arm Introduces A New Big Core, The Cortex-A720
  • Arm Launches Next-Gen Efficiency Core; Cortex-A520
  • TSMC N3, And Challenges Ahead
  • A Look At AMD’s 3D-Stacked V-Cache
WikiChip Fuse

WikiChip Fuse

Your Chips and Semi News

  • Home
  • Account
  • Main Site
  • Architectures
    • x86
    • ARM
    • RISC-V
    • Power ISA
    • MIPS
  • Supercomputers
  • 14 nm
  • 12nm
  • 10nm
  • 7nm
  • 5nm

KaisHeng

Desktop Processors Mobile Processors Server Processors 

Zhaoxin launches their highest-performance Chinese x86 chips

January 21, 2018May 25, 2021 David Schor 28nm, China, HLMC, KaisHeng, KaiXian, TSMC, VIA Technologies, x86, Zhaoxin

Zhaoxin has launched the highest-performance domestic Chinese x86 chips based on the WuDaoKou microarchitecture. Zhaoxin new chips are a brand new SoC design featuring higher performance cores, a new DDR4 memory controller and integrated graphics.

Read more

Top Six Articles

  • A Look At Intel 4 Process Technology
  • TSMC N3, And Challenges Ahead
  • Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • A look at Nvidia’s NVLink interconnect and the NVSwitch

Recent

  • Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

    Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

    May 28, 2023May 28, 2023 David Schor
  • Arm Introduces A New Big Core, The Cortex-A720

    Arm Introduces A New Big Core, The Cortex-A720

    May 28, 2023May 28, 2023 David Schor
  • Arm Launches Next-Gen Efficiency Core; Cortex-A520

    Arm Launches Next-Gen Efficiency Core; Cortex-A520

    May 28, 2023May 28, 2023 David Schor
  • TSMC N3, And Challenges Ahead

    TSMC N3, And Challenges Ahead

    May 27, 2023May 27, 2023 David Schor
  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor

Random Picks

A Look At Samsung’s 4LPE Process

A Look At Samsung’s 4LPE Process

June 26, 2022June 26, 2022 David Schor
A Look At AMD’s 3D-Stacked V-Cache

A Look At AMD’s 3D-Stacked V-Cache

December 27, 2022December 27, 2022 David Schor
TSMC Details 5 nm

TSMC Details 5 nm

March 21, 2020May 25, 2021 David Schor
IEDM 2017: AMD’s grand vision for the future of HPC

IEDM 2017: AMD’s grand vision for the future of HPC

December 5, 2017May 25, 2021 David Schor
X-Gene 3 gets a second chance at Ampere with a new 32-core 16nm ARM processor

X-Gene 3 gets a second chance at Ampere with a new 32-core 16nm ARM processor

February 5, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Samsung Foundry On EUV, Pellicles, Capacity, and Yield

Samsung Foundry On EUV, Pellicles, Capacity, and Yield

July 25, 2022July 25, 2022 David Schor
Intel Opens AIB for DARPA’s CHIPS Program as a Royalty-Free Interconnect Standard for Chiplet Architectures

Intel Opens AIB for DARPA’s CHIPS Program as a Royalty-Free Interconnect Standard for Chiplet Architectures

July 24, 2018May 25, 2021 David Schor
SEMICON West 2019: ASML EUV Update

SEMICON West 2019: ASML EUV Update

July 21, 2019May 25, 2021 David Schor
TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

May 14, 2020May 23, 2021 David Schor
Samsung quietly unveils their latest flagship processor: Exynos 9 Series 9810

Samsung quietly unveils their latest flagship processor: Exynos 9 Series 9810

November 10, 2017May 25, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor

ARM WorldView All

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
Architectures Desktop Processors Mobile Processors Server Processors 

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

May 28, 2023May 28, 2023 David Schor
Arm Introduces A New Big Core, The Cortex-A720
Architectures Desktop Processors Mobile Processors 

Arm Introduces A New Big Core, The Cortex-A720

May 28, 2023May 28, 2023 David Schor
Arm Launches Next-Gen Efficiency Core; Cortex-A520
Architectures Embedded Processors Mobile Processors 

Arm Launches Next-Gen Efficiency Core; Cortex-A520

May 28, 2023May 28, 2023 David Schor
Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor

About

WikiChip
WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

  • Main Site
  • WikiChip Fuse
  • Newsletter
  • Main Site
  • WikiChip Fuse

Copyright © 2023 WikiChip LLC. All rights reserved.