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Sunday, February 5, 2023
Latest:
  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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Zhaoxin

Desktop Processors Mobile Processors Roadmaps Server Processors 

Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

December 12, 2019May 25, 2021 David Schor 16nm, 5 nm, China, DDR5, PCIe 4.0, x86, Zhaoxin

Zhaoxin unveiled plans for two new x86 SoC designs: a high-performance 16-nanometer server chip with up to 32 cores and a separate 7 nm mobile and desktop chip.

Read more
Desktop Processors Mobile Processors Server Processors 

Zhaoxin launches their highest-performance Chinese x86 chips

January 21, 2018May 25, 2021 David Schor 28nm, China, HLMC, KaisHeng, KaiXian, TSMC, VIA Technologies, x86, Zhaoxin

Zhaoxin has launched the highest-performance domestic Chinese x86 chips based on the WuDaoKou microarchitecture. Zhaoxin new chips are a brand new SoC design featuring higher performance cores, a new DDR4 memory controller and integrated graphics.

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Top Six Articles

  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • A Look At Intel 4 Process Technology
  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • Intel Silently Launches Cannon Lake
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI

A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI

July 10, 2021August 2, 2021 David Schor
Hot Chips 33 Program: Alder Lake, Sapphire Rapids, Zen 3, Next-Gen Z, Neoverse N2, And Many More

Hot Chips 33 Program: Alder Lake, Sapphire Rapids, Zen 3, Next-Gen Z, Neoverse N2, And Many More

May 13, 2021May 23, 2021 David Schor
A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

January 12, 2020May 25, 2021 David Schor
Qualcomm Launches The Snapdragon 710, A New Premium Mid-Range SoC

Qualcomm Launches The Snapdragon 710, A New Premium Mid-Range SoC

May 25, 2018May 25, 2021 David Schor
Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022

Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022

May 21, 2019May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Hot Chips 33 Program: Alder Lake, Sapphire Rapids, Zen 3, Next-Gen Z, Neoverse N2, And Many More

Hot Chips 33 Program: Alder Lake, Sapphire Rapids, Zen 3, Next-Gen Z, Neoverse N2, And Many More

May 13, 2021May 23, 2021 David Schor
Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

September 20, 2021September 20, 2021 David Schor
Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

July 26, 2021July 26, 2021 David Schor
The Magnets Under the Icy Lake

The Magnets Under the Icy Lake

May 23, 2021July 8, 2021 David Schor
Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor
Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

December 12, 2019May 25, 2021 David Schor
Core i7-8700K overclockability silicon lottery stats

Core i7-8700K overclockability silicon lottery stats

November 12, 2017May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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