Skip to content
Wednesday, July 6, 2022
Latest:
  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3
  • Arm Introduces The Cortex-A715
  • GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas
WikiChip Fuse

WikiChip Fuse

Your Chips and Semi News

  • Home
  • Account
  • Main Site
  • Architectures
    • x86
    • ARM
    • RISC-V
    • Power ISA
    • MIPS
  • Supercomputers
  • 14 nm
  • 12nm
  • 10nm
  • 7nm
  • 5nm

Gyoukou

Supercomputers 

Japan cancels contract, kicks out 4th fastest supercomputer amid fraud charges

April 20, 2018May 25, 2021 David Schor Green500, Gyoukou, Japan, PEZY, PEZY-SCx, Supercomputers, ThruChip Interface, TOP500

The future of Japan’s innovative trio of startups – PEZY Computing, ExaScaler, and UltraMemory – is now at risk following the termination of their supercomputer, the world’s fourth-fastest supercomputer amid fraud charges.

Read more

Top Six Articles

  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • A Look At Intel 4 Process Technology
  • Arm Introduces The Cortex-A715
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3
  • A Look At Samsung’s 4LPE Process
  • TSMC Details 5 nm

Recent

  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    July 5, 2022July 5, 2022 David Schor
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    June 28, 2022June 28, 2022 David Schor
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3

    Arm Unveils Next-Gen Flagship Core: Cortex-X3

    June 28, 2022June 28, 2022 David Schor
  • Arm Introduces The Cortex-A715

    Arm Introduces The Cortex-A715

    June 28, 2022June 29, 2022 David Schor
  • GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

    GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

    June 27, 2022June 27, 2022 David Schor
  • A Look At Samsung’s 4LPE Process

    A Look At Samsung’s 4LPE Process

    June 26, 2022June 26, 2022 David Schor

Random Picks

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
IEDM 2017: Sony’s 3-layer stacked CMOS image sensor technology

IEDM 2017: Sony’s 3-layer stacked CMOS image sensor technology

February 3, 2018May 25, 2021 David Schor
Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

July 26, 2021July 26, 2021 David Schor
The Fuse!

The Fuse!

October 30, 2017May 25, 2021 David Schor
Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

September 20, 2021September 20, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Arm Introduces Its Confidential Compute Architecture

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
SiFive Launches 7 Series, Their Highest Performance RISC-V Cores

SiFive Launches 7 Series, Their Highest Performance RISC-V Cores

November 8, 2018May 25, 2021 David Schor
Samsung-Esperanto Concept AI-SSD Prototype

Samsung-Esperanto Concept AI-SSD Prototype

November 21, 2021November 21, 2021 David Schor
AMD Discloses Initial Zen 2 Details

AMD Discloses Initial Zen 2 Details

November 18, 2018May 25, 2021 David Schor
TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

March 3, 2020May 25, 2021 David Schor
Intel Rolls Out Cascade Lake Xeon W Processors

Intel Rolls Out Cascade Lake Xeon W Processors

June 3, 2019May 25, 2021 David Schor
Wave to acquire MIPS

Wave to acquire MIPS

June 13, 2018May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

About

WikiChip
WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

  • Main Site
  • WikiChip Fuse
  • Newsletter
  • Main Site
  • WikiChip Fuse

Copyright © 2022 WikiChip LLC. All rights reserved.