ISSCC

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

March 9, 2018May 25, 2021 David Schor 14 nm, floorplan, Intel, ISSCC, ISSCC 2018, Skylake, Skylake-SP, x86, Xeon Scalable

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.

IEDM 2017 ISSCC 2018 Process Technologies

IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

February 17, 2018May 25, 2021 David Schor 10nm, FinFET, IEDM, IEDM 2017, Intel, ISSCC, ISSCC 2018, process technology

At IEDM 2017 and ISSCC 2018 Intel detailed their upcoming 10nm node, an aggressively scaled 7nm-class process technology that features new scaling accelerators as well as cobalt interconnect for the first time in high-volume manufacturing.