The IEEE Symposium on High-Performance Chips Program Committee unveiled today the program for its Hot Chips 33 conference. Due to the ongoing COVID-19 pandemic, the conference will remain in virtual form and be held from Sunday, August 22 to Tuesday, August 24, 2021. The conference comprises three days – Tutorials on the first day followed by two days of technical sessions.
Tutorials
Sunday, August 22 is dedicated to tutorials. There are two tutorials, one focusing on machine learning performance while the other one discusses advanced packaging.
Tutorial 1: ML Performance and Real World Applications |
Machine learning is a rich, varied, and rapidly evolving field. This tutorial will explore the applications, performance characteristics, and key challenges of many different unique workloads across training and inference. In particular, we will focus on hardware/software co-optimization for the industry-standard MLPerf™ benchmarks and selected applications and considerations at prominent cloud players. |
Tutorial 2: Advanced Packaging |
This tutorial will discuss advanced packaging technologies that enable performance and density improvements. Descriptions of the technologies and how they are used in cutting edge applications will be made by industry leaders in packaging and chip design. |
Conference Day 1
Technical sessions Day 1 start on Monday, August 23. Day 1 features 4 categories – Industry CPUs, Academic Spinout Chips, Infrastructure and Data Processors, and Technology Solutions. Additionally, there are two keynotes from Skydio and Synopsys.
CPUs |
AMD |
AMD Next Generation “Zen 3” Core |
Intel |
Intel Alder Lake CPU Architectures |
Next-Gen Intel Xeon CPU – Sapphire Rapids |
IBM |
The >5GHz next generation IBM Z processor chip |
Academic Spinout Chips |
UW–Madison |
Mozart: Designing for Software Maturity and the Next Paradigm for Chip Architectures |
UMich |
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware |
Infrastructure and Data Processors |
ARM |
Arm Neoverse N2: Arm’s second-generation high performance infrastructure CPUs and system products |
Intel |
Intel’s Hyperscale-Ready SmartNIC for Infrastructure Processing |
NVIDIA |
NVIDIA DATA Center Processing Unit (DPU) Architecture |
Enabling Technologies |
EdgeQ |
Architecting an Open RISC-V 5G and AI SoC for Next Generation 5G Open Radio Access Network |
Infineon |
Heterogeneous computing to enable the highest level of safety in automotive systems |
Samsung |
Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for machine learning accelerators |
Conference Day 2
Technical sessions Day 2 start on Monday, August 23. Day 2 includes presentations from 4 additional categories – ML Inference for the Cloud, ML and Computation Platforms, Graphics and Video, and New Technologies. There is also an additional keynote by Dimitri Kusnezov, Deputy Under Secretary for AI and Technology, Department of Energy.
ML Inference for the Cloud |
Enflame |
AI Compute Chip from Enflame |
Esperanto |
Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip |
Qualcomm |
Qualcomm Cloud AI 100: 12 TOPs/W Scalable, High Performance and Low Latency Deep Learning Inference Accelerator |
ML and Computation Platforms |
Cerebras |
The Multi-Million Core, Multi-Wafer AI Cluster |
D.E. Shaw Research |
The Anton 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations |
Graphcore |
Graphcore Colossus Mk2 IPU |
SambaNova |
SambaNova SN10 RDU: Accelerating Software 2.0 with Dataflow |
Graphics and Video |
AMD |
AMD RDNA(TM) 2 Graphics Architecture |
Google |
Google’s Video Coding Unit (VCU) Accelerator |
Intel |
Intel’s Ponte Vecchio GPU Architecture |
Xilinx |
Xilinx 7nm Edge Processors |
New Technologies |
IonQ |
The IonQ Trapped Ion Quantum Computer Architecture |
Kagawa University |
New Value Creation by Nano-Tactile Sensor Chip Exceeding our Fingertip Discrimination Ability |
Mojo Vision |
Mojo Lens – AR Contact Lenses for Real People |
Samsung |
World Largest Mobile Image Sensor with All Directional Phase Detection Auto Focus Function |
Hot Chips 33 registration is open. Since the conference is virtual, registration fees are extremely reasonable ($125 for non-IEEE members and $50 for non-IEEE student members) and – as always – WikiChip encourages anyone interested to attend the conference as the presentations are always well-made and interesting. Registration can be done via the Hot Chips website here.
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