Intel Announces 10th Gen Core Processors Based On 10nm Ice Lake, Now Shipping

Intel Ice Lake processors are finally here and are shipping to OEMs today.

10th Generation Core

The Ice Lake platform is Intel’s first high-volume 10-nanometer SoCs. Those processors are branded as 10th Generation Core. We have talked about some of the improvements in Ice Lake last week. If you are interested in the full details of the chip you might find our Ice Lake architectural page helpful as well. Ice Lake is aimed at the ultra-mobile thin-and-light platform.

In addition to the new Sunny Cove cores and the powerful Gen11 GPU, Ice Lake is introducing a number of new features and enhancements in Ice Lake: DL Boost, Dynamic Tuning 2.0, Integrated Thunderbolt 3, Wi-Fi 6 (on chipset), better encoders, and a display engine. We will touch on those in more detail below.

SKUs

Ice Lake will be covering the mainstream through premium mobile product line. It will include fanless and fan designs. All models feature up to four Sunny Cove cores with up to eight threads with up to 4.1 GHz max turbo frequency. Models will include Gen11 Intel UHD Graphics with Iris Plus models featuring up to the full 64 EUs operating at up to 1.1 GHz. Models support up to quad-channel LPDDR4X-3733 memory. It’s worth noting that Intel did not share with us the full SKU list, saying “We will be sharing more with system availability as with standard practice.”

10nm+ Improvements

Ice Lake is considered Intel’s next major architecture following Skylake, building on many of the foundational improvements that were introduced in prior generations. “Every single IP on Ice Lake was touched.” Last year Intel talked about “10nm” and “10nm+”. Intel says that Ice Lake is built on their learnings from their Cannon Lake products which were largely treated as a learning vehicle. Between Cannon Lake and Ice Lake Intel made a number of changes in order to improve the process for their products. One such change was the addition of an extra metal layer (originally said to be 12, is now 13 on Ice Lake) in order to improve the power delivery of the chip. Additionally, Intel says they have improved the threshold voltage of the transistors as well as their MIM cap among other changes.

Architecture

The first improvement over Skylake are the new Sunny Cove core which Intel says delivers 15 to 18 percent higher IPC. Thse cores come with AVX-512 as well as DL Boost which can provide over 2x improvement in inference workloads using the new AVX-512 VNNI vector extensions.

The second improvement is the new memory controller. Ice Lake integrates a new 4x 32-bit LPDDR4X-3733 dual-rank system which supports up to 32 GiB of memory and is capable of 50-60 GB/s of bandwidth which is a requirement in order to enjoy the full capabilities of the new Gen11 GPU and display engine. Ice Lake memory controller now supports the ability to autonomously dynamically change the frequency of the memory subsystem depending on the workload in order to optimize the power and performance.

A new addition in Ice Lake is the Thunderbolt 3 integration. There are a number of reasons why this was done. The first one is the BOM and the motherboard complexity. Implementing Thunderbolt 3 on the motherboard added a lot of complexity, cost, and routing challenges. The integration significantly reduces board area, cost, and complexity. With the exception of the power delivery, everything is integrated on-die. The on-die implementation has some other benefits such as reducing the active power for things such as display. Attached devices benefit from the direct link to the CPU and, in turn, to memory. In total, Ice Lake has four Thunderbolt 3 ports. All four ports have the same capabilities and can be used simultaneously at full performance at up to 40 Gbps per port. It’s worth noting that all four ports are Converged I/O (CIO) ports, meaning they each support USB 3.1, Thunderbolt 3, and Displayport.

On the graphics side, Ice Lake integrates the Gen11 GPU which features a more efficient and more powerful 3d performance which the company claims can now run 1080p games. The media encoders on Ice Lake were also improved with new dual-HEVC encoders, enabling Ice Lake to create and playback 4K HDR content. On the display pipes side, Ice Lake has a new Adaptive Sync and HDR-capable display pipes that support HDR 3 and DisplayPort 1.4, supporting error correction and compression.

PCH

Ice Lake is a 2-chip solution – consisting of the microprocessor and the chipset (PCH). While the processor is made on 10-nanometer, the PCH is fabricated on a more mature node which in this case is 14 nm. The PCH has an expanded I/O supporting PCIe, USB, SATA, and audio DSP for low-power voice processing. The PCH also integrates WiFi 6+ CNVi. The new Ice Lake platform features a new integrated power delivery on both the PCH and the CPU which Intel says allows them to save on platform area by about 15% and it reduces the power delivery rails for the OEMs by roughly half.

Packaging

Ice Lake is launching in two variants – 15 W Ice Lake U which will make use of the Type3 package and the 9 W Ice Lake Y processors which will use the Type4 package.

Interestingly the new packages include a thin film magnetic array inductor on the landing side which have high efficiency at lower power but also support the fully processor dynamic frequency range. You can distinctly see them in the photo below.

Dynamic Tuning 2.0

Earlier we mentioned that Ice Lake features Dynamic Tuning 2.0. Dynamic Tuning was first introduced with Kaby Lake G in order to better coordinate the system power between the AMD GPU and the Intel CPU that were both integrated onto the same package. On Ice Lake, Intel uses machine learning in order to better optimize the performance and power of the microprocessor. The chip uses a number of machine learning algorithms in order to optimize, within PL2 and PL4 thermal envelopes, the behavior of the overall system in order to maximize the performance and responsiveness based on the workload being used which allows for longer turbo periods. The feature relies on OS-level interactions and is supported by both Windows and Linux.