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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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accelerator

Architectures Data Processing Unit Subscriber Only Content 

YouTube Accelerates Transcoding

August 21, 2021August 21, 2021 David Schor accelerator, ASPLOS 2021, google, H.264, subscriber only (general), video acceleration, Video Coding Unit (VCU), VP9, YouTube

Google accelerates YouTube and other video services with custom silicon.

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Neural Processors 

Cambricon Reaches for the Cloud With a Custom AI Accelerator, Talks 7nm IPs

May 26, 2018May 25, 2021 David Schor 16nm, 7nm, accelerator, AI, Cambricon, edge computing, inference, MLU, neural processors

Cambricon has announced their first high-performance and high-power AI accelerator for the data center in an effort to gain market share in the growing Chinese AI market.

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Neural Processors 

Fujitsu launches a deep learning accelerator for industrial apps

January 16, 2018May 25, 2021 Matt Larson accelerator, AI, Arria, edge computing, FPGA, Fujitsu, industrial, neural processors

Fujitsu launches a new deep learning accelerator PCIe card specifically for accelerating inference for edge computers for industrial equipment.

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Neural Processors 

Bitcoin giant Bitmain enters the AI market with the BM1680 neural processor

November 8, 2017May 25, 2021 David Schor 28HPC+, accelerator, AI, ASIC, Bitmain Technologies, neural processors, Xilinx

The ASIC Bitcoin design company Bitmain has announced they are entering the AI market with their new custom design BM1680 neural processor which will be at the heart of the new Sophon family of AI PCIe accelerator cards and full servers.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips
  • Arm Introduces The Cortex-A715
  • N3E Replaces N3; Comes In Many Flavors

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Intel Axes Nervana Just Two Months After Launch

Intel Axes Nervana Just Two Months After Launch

February 3, 2020May 25, 2021 David Schor
Intel Launches Mainstream Cascade Lake Xeon W Workstation Processors

Intel Launches Mainstream Cascade Lake Xeon W Workstation Processors

October 7, 2019May 25, 2021 David Schor
Samsung Discloses Exynos M4 Changes, Upgrades Support for ARMv8.2, Rearranges The Back-End

Samsung Discloses Exynos M4 Changes, Upgrades Support for ARMv8.2, Rearranges The Back-End

January 14, 2019May 25, 2021 David Schor
SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators

SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators

September 20, 2022September 20, 2022 David Schor
DARPA ERI: HIVE and Intel PUMA Graph Processor

DARPA ERI: HIVE and Intel PUMA Graph Processor

August 4, 2019May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

May 21, 2021June 24, 2021 David Schor
Eni fires up its supercomputer, breaks into the TOP500’s top ten

Eni fires up its supercomputer, breaks into the TOP500’s top ten

January 19, 2018May 25, 2021 David Schor
Arm Targets Data Centers with New Roadmaps, Architectures, and Standards

Arm Targets Data Centers with New Roadmaps, Architectures, and Standards

December 16, 2018May 25, 2021 David Schor
IBM Releases Power ISA v3.1; To Present POWER10 At Hot Chips 32

IBM Releases Power ISA v3.1; To Present POWER10 At Hot Chips 32

May 23, 2020May 23, 2021 David Schor
GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

June 27, 2022June 27, 2022 David Schor
IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

March 8, 2020May 25, 2021 David Schor
IEDM 2017: Intel details 22FFL, a relaxed 14nm process for foundry customers, targets mobile and RF apps

IEDM 2017: Intel details 22FFL, a relaxed 14nm process for foundry customers, targets mobile and RF apps

December 15, 2017May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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