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Latest:
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm’s New Cortex-M55 Breathes Helium
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • Arm Unveils the Cortex-A78: When Less Is More
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Mobile Processors

Mobile Processors 

Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

August 1, 2019 David Schor 0 Comments 10nm, Gen11, Ice Lake, Sunny Cove, x86

Intel launches 10th Generation Core based on the Ice Lake microarchitecture with a lineup of 11 new mobile chips with a turbo of up to 4.1 GHz

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Architectures Mobile Processors 

Intel Announces 10th Gen Core Processors Based On 10nm Ice Lake, Now Shipping

May 28, 2019 David Schor 1 Comment 10nm, Ice Lake, Sunny Cove, x86

Intel announces 10th Generation Core based on the 10nm Ice Lake Chips which are now shipping to OEMs.

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Architectures Floorplanning Mobile Processors 

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

May 12, 2019 David Schor 5 Comments 10nm, 7nm, AVX-512, Gen11, Ice Lake, Sapphire Rapids, Tiger Lake

A look at Ice Lake mobile CPUs which bring a new CPU core, a new Gen11 GPU, and a new 4th Gen IPU as well the new roadmap detailed by Intel at their recent investor meeting which includes Xeon Sapphire Rapids CPUs and 7nm Xe Data Center GPGPUs for 2021.

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Mobile Processors 

Intel, AMD Add New Mobile Pro Processors

April 16, 2019 David Schor 0 Comments AMD, Intel, x86

This month both Intel and AMD introduced new mobile processors for business with enterprise security features.

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Architectures Mobile Processors 

Samsung Discloses Exynos M4 Changes, Upgrades Support for ARMv8.2, Rearranges The Back-End

January 14, 2019 David Schor 0 Comments 8LPP, ARM, ARMv8, ARMv8.2, Exynos, Samsung

Samsung details the initial changes to the Exynos M4 core found in the Exynos 9820 which will be in Samsung’s next-generation Galaxy S10 smartphone.

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Architectures Embedded Processors Mobile Processors 

SiFive Launches 7 Series, Their Highest Performance RISC-V Cores

November 8, 2018 David Schor 0 Comments RISC-V, SiFive

SiFive launches 7 Series, their highest-performance RISC-V cores.

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Mobile Processors 

Qualcomm Refreshes Mid-Range Lines with the 632, 439, and 429

June 27, 2018 David Schor 0 Comments 12 nm, 14 nm, 14LPP, ARM, ARMv8, Qualcomm, SDM429, SDM439, SDM632, Snapdragon, Snapdragon 400, Snapdragon 600

Qualcomm has refreshed their mid-range lines with the new Snapdragons 632, 439, and 429 SoCs.

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Mobile Processors 

MediaTek Announces The Helio P22, A New Premium Mid-Range SoC

May 25, 2018 Matt Larson 0 Comments 12nm, ARM, ARMv8, Helio, Helio P, MediaTek

MediaTek has unveiled the Helio P22, the company’s latest premium mid-range smartphone SoC

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Mobile Processors 

Qualcomm Launches The Snapdragon 710, A New Premium Mid-Range SoC

May 25, 2018 David Schor 0 Comments 10LPE, 10nm, ARM, ARMv8, Kyro, Kyro 360, Qualcomm, Snapdragon, Snapdragon 700

Qualcomm has launched the first premium mid-range SoC from the new Snapdragon 700 series.

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Mobile Processors 

Intel Silently Launches Cannon Lake

May 15, 2018 David Schor 0 Comments 10nm, Cannon Lake, Intel, x86

Intel has silently launched the first 10nm-based Cannon Lake SKU.

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Top Six Articles

  • TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging
  • VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM
  • SEMICON West 2019: ASML EUV Update
  • Arm Cortex-X1: The First From The Cortex-X Custom Program
  • TSMC 5-Nanometer Update
  • IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

Recent

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
  • Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
  • Arm Cortex-X1: The First From The Cortex-X Custom Program

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
  • Comment
  • Recent
  • Steffen Eilers says:

    Yes....

  • Steffen says:

    Really exited for the time when ARM tries to serio...

  • Piotr says:

    Depends on what you're comparing. N6 manufacturing...

  • espinozahg says:

    Hey, everybody talks about GPU FLOPS but nobody ab...

  • Filipe says:

    O bom é q a arm tá longe de alcançar esse pata...

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

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    Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0

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    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
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    Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.

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