Skip to content

Friday, July 4, 2025

Latest:

Arm Launches Next-Gen Big-Core: Cortex-A725
Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925
Arm Launches Next-Gen Flagship Cortex-X925
Amazon Debuts 4th Gen Graviton
Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

WikiChip Fuse

Your Chips and Semi News

Home
Account
Main Site
Architectures
- x86
- ARM
- RISC-V
- Power ISA
- MIPS
Supercomputers
14 nm
12nm
10nm
7nm
5nm

DARPA HIVE

Architectures ERI Summit 2019 Server Processors

DARPA ERI: HIVE and Intel PUMA Graph Processor

August 4, 2019May 25, 2021 David Schor DARPA, DARPA HIVE, Graph Processor, Intel PUMA, Programmable Unified Memory Architecture, PUMA

An update on the DAPRA HIVE program and the first disclosure of Intel’s Graph Analytics (GA) processor that is currently under development

Top Six Articles

TSMC N3, And Challenges Ahead
A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
TSMC 5-Nanometer Update
N3E Replaces N3; Comes In Many Flavors
TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

Recent

Arm Launches Next-Gen Big-Core: Cortex-A725
May 29, 2024May 29, 2024 David Schor
Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925
May 29, 2024May 29, 2024 David Schor
Arm Launches Next-Gen Flagship Cortex-X925
May 29, 2024May 29, 2024 David Schor
Amazon Debuts 4th Gen Graviton
December 8, 2023December 9, 2023 David Schor
Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium
November 22, 2023November 22, 2023 David Schor
Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
May 28, 2023May 28, 2023 David Schor

Random Picks

Intel Opens AIB for DARPA’s CHIPS Program as a Royalty-Free Interconnect Standard for Chiplet Architectures

July 24, 2018May 25, 2021 David Schor

Intel Launches 12th Gen Core Desktop Alder Lake Processors

October 27, 2021November 3, 2021 David Schor

Core i7-8086K Overclockability Silicon Lottery Stats

June 17, 2018May 25, 2021 David Schor

Intel Starts Shipping Initial Nervana NNP Lineup

December 6, 2019May 25, 2021 David Schor

TSMC 2021 Foundry Update: Foundry Roadmap

July 6, 2021July 6, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex Cortex-A edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Desktop Processors Mobile Processors

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Architectures Server Processors

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor

Architectures Data Processing Unit Desktop Processors Mobile Processors

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor

Architectures Desktop Processors Mobile Processors

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor

Architectures Desktop Processors Mobile Processors Server Processors

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor

Architectures Server Processors

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

ORNL’s 200-petaFLOPS Summit Supercomputer Has Arrived, To Become World’s Fastest

June 16, 2018May 25, 2021 David Schor

Fujitsu launches a deep learning accelerator for industrial apps

January 16, 2018May 25, 2021 Matt Larson

SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators

September 20, 2022September 20, 2022 David Schor

Japan cancels contract, kicks out 4th fastest supercomputer amid fraud charges

April 20, 2018May 25, 2021 David Schor

A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC

April 5, 2020May 25, 2021 David Schor

A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

November 10, 2019May 25, 2021 David Schor

TSMC Announces 6-Nanometer Process

April 16, 2019May 25, 2021 David Schor

ARM WorldView All

Architectures Desktop Processors Embedded Processors Mobile Processors Roadmaps

Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925

May 29, 2024May 29, 2024 David Schor

Architectures Desktop Processors Embedded Processors Mobile Processors

Arm Launches Next-Gen Big-Core: Cortex-A725

May 29, 2024May 29, 2024 David Schor

Architectures Desktop Processors Server Processors

Arm Launches Next-Gen Flagship Cortex-X925

May 29, 2024May 29, 2024 David Schor

Server Processors

Amazon Debuts 4th Gen Graviton

December 8, 2023December 9, 2023 David Schor

Embedded Processors Mobile Processors

Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

November 22, 2023November 22, 2023 David Schor

Architectures Desktop Processors Mobile Processors Server Processors

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

May 28, 2023May 28, 2023 David Schor

About

WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

Main Site
WikiChip Fuse
Newsletter

Main Site
WikiChip Fuse

Copyright © 2025 WikiChip LLC. All rights reserved.