Unlike logic scaling which is still delivering double the transistor density, memory scaling is very much collapsing. Intel 4 is introducing two standard 6T SRAM cells – high-density and high-current cells. The high-density (PU:PG:PD = 1:1:1) cell has shrunk from 0.0312 squared micron down to 0.0240 while the high-performance (PU:PG:PD = 1:2:2) shrunk to 0.0300 squared micron. Those cells saw a 0.77x and 0.68x scaling respectively which is a far cry from the historical ~0.6x scaling we used to see. In addition to the 6T cells, Intel developed an 8T SRAM bitcell which adds a 3-fin read port to a 6T write port for a total area of 0.0360 squared microns. Although consuming 1.74x the area, it uses 6x and 12x lower read/write energy versus the HDC and HCC respectively.
When comparing Intel 4 density against foundry offerings by TSMC and Samsung, Intel 4 SRAM sizes are actually quite underwhelming. For our density estimates here, we use our standard iso-assist circuit overhead approach which may differ from the company’s own reported numbers. To that end, Intel 4 HDC produces a memory density of around 27.8 Mib/mm². Compared to TSMC N5 SRAM which boasts a density of 31.8 Mib/mm², Intel is roughly 14.5% less dense.
Intel also presented its Intel 4 SRAM shuttle test chip. The test vehicle features 57 Mib of high-density cells along with 50 Mib of high-performance cells. Silicon measurements demonstrated 90th percentile Vim operation of 0.6 V for high-density cells and 0.55 V for high-performance cells.
Intel 4 also improved the MIM capacitor from Intel 7. The new MIMcap on Intel 4 offers an impressive double the capacitance from Intel 7 at 376 fF/μm².
After a half-decade of manufacturing problems, Intel is finally showing signs of recovery. At the 2022 IEEE Symposium on VLSI Technology & Circuits, Intel finally unveiled their next-generation leading-edge high-performance process node – Intel 4. The node is expected to ramp towards the end of this year. While not as comprehensive feature-wise as their usual nodes, Intel 4 offers enough to support the compute tile needed for their next-generation client SoC, codenamed Meteor Lake. The node takes full advantage of EUV and offers around a 20% performance/watt gain over Intel 7. At the SoC level, the node offers as much as a 40% reduction in power at iso-frequency or >20% frequency improvement at iso-power. Additionally, the node boasts a full 2.04x density scaling for its high-performance library, over the highest-performance cells used for Alder Lake in Intel 7. On paper, those PPA characteristics positions the company’s new Intel 4 process at performance levels better than TSMC N3 and Samsung 3GAE. On the density front, Intel 4 appears highly competitive against N3 high-performance libraries.
It is clear that Intel 4 was made with a great deal of care. Careful standard cell scaling along with architectural simplification helped reduce process complexity. Reverting back to easier materials along with the introduction of EUV helped greatly reduce masks, steps, and pattering variability and complexity. Intel says the new node also brings good reduction in cost-per-transistor versus Intel 7.
Despite all of this, we consider Intel 4 a stopgap node – a minimum viable product; an interim node on the way to Intel 3 which is expected to ramp roughly a year after Intel 4 (late next year). Intel 3 will be the final FinFET process from Intel. Everything thereafter will utilize a new gate-all-around transistor architecture the company calls RibbonFET. Intel 3 happens to also be the upcoming flagship node for the Intel Foundry Services (IFS). Intel 3 builds on Intel 4 which is why properly ramping Intel 4 to good yields and high volume in a timely manner is so paramount. The company already disclosed that Intel 3 will offer another 18% performance/watt improvement, which is a full-node worth of improvement on its own. The process will also introduce a new denser high-performance library along with a more complete set of other libraries and IPs.
With the Intel 4 process detailed in this article, the company’s ability to regain its leadership position in the semiconductor industry rests entirely on its execution.