Intel axes Knights Hill, plans a new microarchitecture for exascale

Back in June, Rich over at insideHPC picked up on the fact that the budget for the Aurora supercomputer was missing. At the time he was told that the Aurora contract “was not cancelled”. Rich speculated that the project might have shifted directly to being an Exascale project, possibly with an entirely different architecture.

He pointed out that the DoE FY 2018 Budget Request gave some initial hints on what’s happening:

The ALCF upgrade project will shift toward an advanced architecture, particularly well-suited for machine learning applications capable of more than an exaflop performance when delivered. This will impact site preparations and requires significant new non-recurring engineering efforts with the vendor to develop features that meet ECI requirements and that are architecturally diverse from the OLCF exascale system.

Pieces started falling into place a month ago when the US Department of Energy announced they have reworked the Aurora supercomputer roadmap. The Intel-Cray Aurora supercomputer which was planned for 2018 has been shifted to 2021, scaling up its performance from 180 petaFLOPS to 1 exaFLOPS. The system will likely become the first supercomputer in the United States to break the exaFLOPS barrier.

The project was initially set to make use of Intel’s then-planned Knights Hill processors, the 10 nm successor to Knights Landing. There was a lot of speculation as to the cause of this roadmap shift including issues with their 10 nm process as well as delays due to shift in focus to the field of artificial intelligence.

The last piece of the puzzle came into place yesterday with an announcement by Intel stating the “US Department of Energy recently announced intentions to by 2021 deploy the first US exascale system based on Intel architecture, demonstrating their confidence in Intel’s roadmap and exascale technology portfolio”.

To meet the new deadline Intel stated they will be accelerating technologies on the Intel high-performance computing roadmap. As part of this change the next-generation Xeon Phi processors (codename Knights Hill) has been cancelled. Instead, Intel hopes to develop a “new platform and new microarchitecture specifically designed for exascale”.

At this point nothing is really known about this new microarchitecture including whether it will be a traditional CPU design and whether it will even use the x86 ISA or be 100% backwards compatible. We do know that if Intel plans on anything similar to Phi, in order to scale up to an exascale, the chip would need to be more than twice as powerful and considerably more efficient in order to pack enough of them in a reasonable amount of area.

In the meantime, the traditional HPC space is heating up for war with AMD’s newly launched EPYC processors, Qualcomm’s Centriq, and IBM’s POWER9.