Intel Unveils Foveros Omni And Foveros Direct; Leveraging Hybrid Bonding
Intel unveils the Foveros Omni and Foveros Direct packaging technologies; which will be leveraging multiple base dies and hybrid bonding
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die stacking
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
With hybrid bonding inching towards production, here’s a look at Trishul, Arm’s first exploratory test chip – in collaboration with GlobalFoundries – that demonstrates the feasibility of high-density 3D stacking using Arm’s CoreLink CMN-600 extended to 3D.
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QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor
Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.
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IEDM 2017: Sony’s 3-layer stacked CMOS image sensor technology
At the 2017 IEDM Sony presented their 3-layer stacked state-of-the-art CMOS image sensor (CIS) technology used to minimize rolling shutter distortions and greatly increase the read speed and thus fps through the use of DRAM for temporarily storing the pixel data.
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