Intel Pushes Out Flagship Premium Tiger Lake Mobile Chips
In rolls out flagship premium performance 11th Generation Core Tiger Lake-based mobile processors with eight cores.
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Processors
Arm Launches New Neoverse N2 and V1 Server CPUs: 1.4x-1.5x IPC, SVE, and ARMv9
Arm launches its next-generation server CPUs – Neoverse N2 and Neoverse V1 (formerly Perseus and Zeus). Targeting high-performance servers and the HPC market, the new cores bring 1.4-1.5x higher IPC , SVE support, BFloat16, and the ARMv9 architecture.
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Intel Launches 3rd Gen Ice Lake Xeon Scalable
Intel launches its 3rd Generation Xeon Scalable, formerly Ice Lake. Fabricated on the company’s 10nm process, those server chips go up to 40 Sunny Cove cores and offer a 20% IPC improvement over the prior generation.
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Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
Arm updates its Neoverse roadmap with the Neoverse N2 and V1, introducing SVE support for the first time as well as bfloat16 operations. Like the Cortex-X series, the Neoverse V-series will ease its power and area constraints in favor of higher performance.
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Arm’s New Cortex-M55 Breathes Helium
A look at the new Cortex-M55, an embedded ARMv8 core with the new Helium vector extension.
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Intel Launches Lakefield: An Experiment With Multiple New Technologies
Intel launches Lakefield, a 3D SoC with a new form factor for ultra-mobile devices. This microprocessor allows the chip giant to dabble with a number of new complementary technologies that could potentially find broader uses in the future.
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Arm Unveils the Cortex-A78: When Less Is More
Arm unveils the Cortex-A78 microarchitecture for next-generation flagship smartphones.
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Arm Cortex-X1: The First From The Cortex-X Custom Program
Arm launches the Cortex-X1, their most powerful Cortex CPU to date. This is the first CPU from the new Cortex-X Custom Program.
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IBM Releases Power ISA v3.1; To Present POWER10 At Hot Chips 32
IBM releases Power ISA v3.1. Among the new instructions, there is new bfloat16 support, new reduced-precision outer-product operations including 4-bit integers, and new instruction prefixes. IBM plans on presenting POWER10 at Hot Chips 32.
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NEC Readies 2nd Gen Vector Engine
NEC readies 2nd-generation Vector Engine, Type 20, offering higher memory bandwidth and a few more vector cores.
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