AMD’s Zen CPU Complex, Cache, and SMU
A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.
Read moreA look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.
Read moreIntel has disclosed a new “Tremont” microarchitecture along with the release of their latest architecture ISA programming reference.
Read moreA look at Intel’s tiny intelligent IoT edge mote operating at near-threshold voltage and harvesting solar energy for charging. Equipped with sensors and an SoC with hardware to accelerate convolutional neural networks (CNNs), the chip collects environmental sensory data and captures images which are classified on-chip and sent to a data center in order to improve and optimize agricultural fields.
Read moreA look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.
Read moreIn recent years, IoT devices have been plagued with security issues. Memory and energy constraints of those low-power devices mean there is very little headroom for complex security implementations. At ISSCC 2018, a team of MIT researchers has attempted to address this problem with their low-power fully in-hardware crypto engine IoT RISC-V processor.
Read moreAt ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.
Read moreIntel has finally detailed their recently launched Goldmont Plus microarchitecture and unlike what the name suggests, this is very far from a simple refresh.
Read moreIntel has released the first revision of their new x86 specification that adds support for page-granular and full physical memory encryptions.
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