NEC Refreshes SX-Aurora Vector Engine, Outlines Roadmap
NEC refreshes its SX-Aurora Vector Engine accelerator cards, adopts AMD processors, and outlines roadmap.
Read moreNEC refreshes its SX-Aurora Vector Engine accelerator cards, adopts AMD processors, and outlines roadmap.
Read moreJapanese AI Startup Preferred Networks has been working on a custom training chip with a peak performance of half-petaFLOPS as well as a supercomputer with a peak performance of 2 exaFLOPS (HP).
Read moreSamsung details the high-level changes to the Exynos M5 core found in the Exynos 990.
Read moreIntel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel’s first Xe GPGPU for HPC, 7nm Ponte Vecchio.
Read moreA look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI cores using 1.2 trillion transistors on a half square foot of silicon.
Read moreAI startup Groq makes an initial disclosure of their Tensor Streaming Processor (TSP); a single chip capable of 1 petaOPS or 250 teraFLOPS of compute.
Read moreArm makes headway in HPC and cloud with Cray’s new support for the Fujitsu A64FX and Microsoft deployment of Marvell’s ThunderX2 processors.
Read moreIntel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.
Read moreA look at the microarchitecture of Intel Nervana next-generation data center training neural processor, codename Spring Crest.
Read moreMarvell outlines its current and future Arm server microprocessor roadmap, aiming at a 2-year cadence with greater than 2x performance gen-over-gen.
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