Your Chips and Semi News
At IEDM 2017 and ISSCC 2018 Intel detailed their upcoming 10nm node, an aggressively scaled 7nm-class process technology that features new scaling accelerators as well as cobalt interconnect for the first time in high-volume manufacturing.
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Intel has launched the Xeon D-2100 series of microprocessors based on the Skylake server microarchitecture for networking, storage, IoT, and cloud edge servers.
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After being sold to Macom in 2016, the X-Gene 3 is getting a second chance at Ampere with their announcement of their new 32-core 16nm ARM microprocessor.
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At the 2017 IEDM Sony presented their 3-layer stacked state-of-the-art CMOS image sensor (CIS) technology used to minimize rolling shutter distortions and greatly increase the read speed and thus fps through the use of DRAM for temporarily storing the pixel data.
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Zhaoxin has launched the highest-performance domestic Chinese x86 chips based on the WuDaoKou microarchitecture. Zhaoxin new chips are a brand new SoC design featuring higher performance cores, a new DDR4 memory controller and integrated graphics.
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Eni breaks into the TOP500 with the only private supercomputer to get into the top 10. Utilizing Intel’s latest Skylake-SP processors and packing close to 20 petaFLOPS of computing power, Eni is trying to revolutionize the way exploration & production research is conducted.
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As they continue on building momentum, AMD held an impressive Tech Day at CES 2018 unveiling a series of products and detailing their aggressive roadmap going forward.
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At CES 2018 Intel announced the first series of the much anticipated Core i5 and i7 chips with Radeon graphics. Those parts incorporate a Kaby Lake microprocessor, a Vega M GPU, and 4 GiB of HBM2 cache.
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Exiting stealth mode, Esperanto, a small start-up lead by Dave Ditzel has unveiled their high-performance RISC-V cores they have been working on. Their first product will be a 4,096-core manycore processor designed for accelerating AI workloads.
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Intel has finally detailed their recently launched Goldmont Plus microarchitecture and unlike what the name suggests, this is very far from a simple refresh.
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