TSMC Details 5 nm
TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.
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Foundries
ASML Q4: NXE:3400C Machines Ramp; Strong Growth Due to EUV in 2020
ASML saw a strong fourth-quarter in 2019 thanks to a large EUV shipment with the production of NXE:3400C machines ramping up. ASML shipped a total of 26 EUV machines in 2019 and with 35 machines expected for 2020, however, backlog continues to grow.
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TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY
7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.
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UMC Rolls Out 22-Nanometer
UMC says it has started rolling out its 22-nanometer planar process, offering a new lower-power and cost-sensitive migration path from existing 40nm and 28nm nodes.
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TSMC 5-Nanometer Update
An update on TSMC’s upcoming 5-nanometer process technology.
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ASML Starts NXE:3400C Shipment, But Supply Constraints Loom
ASML sees strong demand for EUV systems as it starts shipping the new NXE:3400C systems to leading-edge foundries.
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Intel Process Technology And Packaging Plans: 10nm in June, 7nm in 2021
An outline of Intel’s process technology and packaging plans including their 10nm and 7nm nodes as discussed at the company’s recent investor meeting.
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IBM Chooses Samsung 7nm EUV for Next-Gen POWER and Z Microprocessors
IBM partners up with Samsung 7nm EUV process for their next-generation of POWER and Z microprocessors.
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Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem
Samsung gives an update on their 7nm EUV-based process, details the foundry technology roadmap down to 3nm and the ARM ecosystem that follows.
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VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP
A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.
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