AI – Page 2 – WikiChip Fuse

A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

November 16, 2019May 25, 2021 David Schor 16nm, AI, Cerebras, Hot Chips, Hot Chips 31, neural processors, training, Wafer-Scale Engine (WSE)

A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI cores using 1.2 trillion transistors on a half square foot of silicon.

Architectures

Groq Tensor Streaming Processor Delivers 1 PetaOPS of Compute

November 15, 2019May 25, 2021 David Schor AI, Groq, inference, neural processors, Software Defined Hardware (SDH), Tensor Streaming Architecture (TSA), Tensor Streaming Processor (TSP)

AI startup Groq makes an initial disclosure of their Tensor Streaming Processor (TSP); a single chip capable of 1 petaOPS or 250 teraFLOPS of compute.

Neural Processors

Intel Announces Keem Bay: 3rd Generation Movidius VPU

November 12, 2019May 25, 2021 David Schor AI, inference, Intel, Intel AI Summit, Movidius, neural processors

Intel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.

Architectures Hot Chips 31 Linley Processor Conference Neural Processors

A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

November 10, 2019May 25, 2021 David Schor 16FF+, 16nm, AI, bfloat16, Hot Chips, Hot Chips 31, Intel, Linley Processor Conference, Nervana, neural processors, NNP, NNP-T, OCP Accelerator Module (OAM), training

A look at the microarchitecture of Intel Nervana next-generation data center training neural processor, codename Spring Crest.

Architectures Hot Chips 31 Neural Processors

Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator

October 20, 2019May 25, 2021 David Schor 10nm, AI, inference, Intel, Nervana, neural processors, Spring Hill, Sunny Cove, Tensilica Vision DSP, Tensilica Vision P6, x86

First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data center inference accelerator.

Architectures Neural Processors

Analog AI Startup Mythic To Compute And Scale In Flash

October 6, 2019May 25, 2021 David Schor 40 nm, AI, analog, eFlash, embedded flash, inference, Mythic, neural processors, RISC-V

A look at the IPU architecture of analog AI startup Mythic which attempts to significantly reduce the power consumption by computing directly in analog in flash.

Architectures Neural Processors

Alibaba Launches DC Inference Accelerators

September 28, 2019May 25, 2021 David Schor 12nm, AI, Ali-NPU, Alibaba, Hanguang, Hanguang 800, inference, neural processors, Wujian, Xuantie

Alibaba launches its own homegrown inference accelerator for their own cloud.

Architectures Hot Chips 31 Neural Processors

Inside Tesla’s Neural Processor In The FSD Chip

September 22, 2019July 11, 2021 David Schor 14 nm, AI, FSD Chip, Full Self-Driving Chip, Hot Chips, Hot Chips 31, inference, neural processors, self-driving, Tesla

A deep dive into the custom-designed Tesla neural processing units integrated inside the company’s full self-driving (FSD) chip based on the Tesla Hot Chips 31 talk.

ERI Summit 2019 Neural Processors

Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

July 15, 2019May 25, 2021 David Schor 14 nm, AI, DARPA, ERI Summit, ERI Summit 2019, Loihi, Nahuku, neuromorphic chip, Pohoiki Beach, Pohoiki Springs

Intel announced Pohoiki Beach and Pohoiki Springs, two new research neuromorphic systems capable of scaling from 64 to 768 Loihi chips with 8 million to 100 million neurons per system.

Architectures Neural Processors

Intel’s Spring Crest NNP-L Initial Details

April 14, 2019May 25, 2021 David Schor 16nm, AI, inference, Intel, Lake Crest, Linley Processor Conference, Nervana, neural processors, NNP, NNP-I, NNP-L, Spring Crest, Spring Hill, training

An initial look into Intel’s upcoming Nervana Neural Network Processor (NNP) accelerators.