Intel Starts Shipping Initial Nervana NNP Lineup
Intel starts shipping its initial Nervana NNP lineup for both inference and training acceleration with four initial models in three different form factors.
Read more
Conferences
NEC Refreshes SX-Aurora Vector Engine, Outlines Roadmap
NEC refreshes its SX-Aurora Vector Engine accelerator cards, adopts AMD processors, and outlines roadmap.
Read more
Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
Japanese AI Startup Preferred Networks has been working on a custom training chip with a peak performance of half-petaFLOPS as well as a supercomputer with a peak performance of 2 exaFLOPS (HP).
Read more
SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel’s first Xe GPGPU for HPC, 7nm Ponte Vecchio.
Read more
A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI cores using 1.2 trillion transistors on a half square foot of silicon.
Read more
A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor
A look at the microarchitecture of Intel Nervana next-generation data center training neural processor, codename Spring Crest.
Read more
IBM Adds POWER9 AIO, Pushes for an Open Memory-Agnostic Interface
IBM adds a third variant of POWER9, the POWER9 Advanced I/O (AIO) processor which incorporates the Open Memory Interface (OMI), a new open memory-agnostic interface.
Read more
TSMC 5-Nanometer Update
An update on TSMC’s upcoming 5-nanometer process technology.
Read more
Intel Unveils the Tremont Microarchitecture: Going After ST Performance
Intel unveils the Tremont microarchitecture, its next-generation low-power small x86 core.
Read more
Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator
First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data center inference accelerator.
Read more