SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
SiFive announces new high-performance RISC-V cores, bifurcating the Performance family into performance and efficiency cores.
Read moreSiFive announces new high-performance RISC-V cores, bifurcating the Performance family into performance and efficiency cores.
Read moreIntel, SiFive demonstrated high-performance RISC-V Horse Creek development platform on Intel 4 Process.
Read moreAlibaba open-source its high-performance XuanTie RISC-V Cores; introduces a new in-house Armv9 server chip
Read moreA look at Esperanto’s ET-SoC-1, the startup’s first AI inference accelerator for the data center. The company took a unique RISC-V approach with a massively multi-core chip with nearly 1,100 custom-designed CPU cores.
Read moreA look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.
Read moreA look at the IPU architecture of analog AI startup Mythic which attempts to significantly reduce the power consumption by computing directly in analog in flash.
Read moreFrom a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.
Read moreNvidia recently presented a research chip comprising dozens of chiplets that enables them to scale from milliwatts to hundreds of watts in order to cater to different markets such as edge, mobile, automotive, and data center.
Read moreSiFive launches 7 Series, their highest-performance RISC-V cores.
Read moreIn recent years, IoT devices have been plagued with security issues. Memory and energy constraints of those low-power devices mean there is very little headroom for complex security implementations. At ISSCC 2018, a team of MIT researchers has attempted to address this problem with their low-power fully in-hardware crypto engine IoT RISC-V processor.
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