Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and 112G Transceivers

Intel has introduced their next-generation flagship data center FPGAs based on their 10-nanometer process. Utilizing a chiplet-based architecture, the company hopes to better customize the product for customer’s demand while iterating faster on PHYs and other connectivity protocols.

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Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips

Last week Intel disclosed initial details of their next-generation core microarchitecture, Sunny Cove, which will make it into future Ice Lake client and server chips among other products.

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Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

At the recent Intel Architecture Day, the company unveiled their latest advanced packaging technology called Foveros, a face-to-face three-dimensional (3D) die stacking packaging technology in an effort to assist with the slowing of Moore’s Law.

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