Reincarnating The 6502 Using Flexible TFT Tech For IoT
Can the 1970s MOS Technology 6502 find new life and new applications in the emerging world of plastic electronics?
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ISSCC
Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC
Intel unveiled BonanzaMine, its first-generation blockchain accelerator ASIC effort.
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IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache
IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.
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CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor
CEA-Leti demonstrates a high-performance microprocessor architecture with a 96-core MIPS processor built with six chiplets 3D-stacked on an active interposer die.
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Radeon RX 5700: Navi and the RDNA Architecture
A look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.
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7nm Boosted Zen 2 Capabilities but Doubled the Challenges
The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.
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ISSCC 2018: The IBM z14 Microprocessor And System Control Design
A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.
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QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor
Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.
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AMD’s Zen CPU Complex, Cache, and SMU
A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.
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ISSCC 2018: MIT’s low-power hardware crypto RISC-V IoT processor
In recent years, IoT devices have been plagued with security issues. Memory and energy constraints of those low-power devices mean there is very little headroom for complex security implementations. At ISSCC 2018, a team of MIT researchers has attempted to address this problem with their low-power fully in-hardware crypto engine IoT RISC-V processor.
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