Reincarnating The 6502 Using Flexible TFT Tech For IoT
Can the 1970s MOS Technology 6502 find new life and new applications in the emerging world of plastic electronics?
Read moreCan the 1970s MOS Technology 6502 find new life and new applications in the emerging world of plastic electronics?
Read moreIntel unveiled BonanzaMine, its first-generation blockchain accelerator ASIC effort.
Read moreSamsung tapes out 3nm GAA test vehicle as it inches towards mass production
Read moreA look at Lakefield, Intel’s new mobile-class heterogeneous penta-core SoC built using two dies 3D-stacked face-to-face using the company Foveros packaging technology.
Read moreTSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.
Read moreIBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.
Read moreCEA-Leti demonstrates a high-performance microprocessor architecture with a 96-core MIPS processor built with six chiplets 3D-stacked on an active interposer die.
Read moreA look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.
Read moreThe transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.
Read moreA look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.
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