ISSCC 2018: The IBM z14 Microprocessor And System Control Design
ArchitecturesCircuit DesignFloorplanningISSCC 2018Server Processors May 13, 2018 4
A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.
Read moreQUEST, A TCI-Based 3D-Stacked SRAM Neural Processor
ArchitecturesCircuit DesignISSCC 2018Neural Processors April 25, 2018 0
Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.
Read moreA look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.
Read moreISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging
ArchitecturesCircuit DesignFloorplanningISSCC 2018 March 24, 2018 6
A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.
Read moreISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan
ArchitecturesCircuit DesignFloorplanningISSCC 2018 March 9, 2018 0
At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.
Read moreIEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
IEDM 2017ISSCC 2018Process Technologies February 17, 2018 3
At IEDM 2017 and ISSCC 2018 Intel detailed their upcoming 10nm node, an aggressively scaled 7nm-class process technology that features new scaling accelerators as well as cobalt interconnect for the first time in high-volume manufacturing.
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