Hot Chips 30: Nvidia Xavier SoC
An overview of the Xavier SoC which was detailed by Nvidia at Hot Chips 30.
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Conferences
Hot Chips 30: AMD Raven Ridge
Overview of AMD Raven Ridge APUs that were recently detailed at Hot Chips 30.
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VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM
A look at Samsung’s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.
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Intel Opens AIB for DARPA’s CHIPS Program as a Royalty-Free Interconnect Standard for Chiplet Architectures
At the DARPA 2018 ERI Summit, Intel announced their contribution of a royalty-free bus standard to DARPA’s CHIPS Program, allowing seamless communication between multiple packaged chiplets.
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VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP
A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.
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VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension
A look at Samsung’s 8nm 8LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.
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VLSI 2018: Samsung’s 11nm nodelet, 11LPP
A look at Samsung’s 11nm 11LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.
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VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers
A preview of some of the process technology papers from next week’s VLSI Symposium.
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ISSCC 2018: The IBM z14 Microprocessor And System Control Design
A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.
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A look at Nvidia’s NVLink interconnect and the NVSwitch
A look at Nvidia’s NVLink interconnect and the 2-billion transistor NVSwitch that is powering Nvidia’s latest DGX-2 deep learning machine.
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