Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

At the recent Intel Architecture Day, the company unveiled their latest advanced packaging technology called Foveros, a face-to-face three-dimensional (3D) die stacking packaging technology in an effort to assist with the slowing of Moore’s Law.

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A Look at NEC’s Latest Vector Processor, the SX-Aurora

A look at the NEC SX-Aurora, their latest vector processor – increasing compute while maintaining a high B/F through six HBM2 modules leveraging TSMC 2nd gen CoWoS technology. The SX-Aurora introduces a new form factor, system architecture, and execution model.

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QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor

Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.

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Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

Intel has announced they will be introducing an 8th generation processor featuring a discrete AMD Radeon GPU along with HBM2. Using Intel’s new EMIB packaging interconnect technology, the single-chip solution provides higher performance while delivering a smaller form factor than comparable solutions.

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The 2,048-core PEZY-SC2 sets a Green500 record

PEZY-SC2 is PEZY’s newest 16nm a many-core processor featuring 2,048 cores that is powering the world’s most power-efficient supercomputer. The chip is the first to use a unique 3D packaging interconnect technology known as TCI in order to achieve a memory bandwidth of over 2 TB/s.

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